Ludwig TAUER
2018-09-18 14:35:05 UTC
Hi folks!
Seems I have found a bug in the PDP-11 emulating the
MUL instruction.
The current code takes the specified register as source
instead of the register pair R and R+1 if the register is even.
The DIV instruction is also invalid, but the other way around:
if R is odd, R is duplicated into the high half of the 32 bit int.
The attached patch will correct the problems.
Hope that helps
Ludwig Tauer
Seems I have found a bug in the PDP-11 emulating the
MUL instruction.
The current code takes the specified register as source
instead of the register pair R and R+1 if the register is even.
The DIV instruction is also invalid, but the other way around:
if R is odd, R is duplicated into the high half of the 32 bit int.
The attached patch will correct the problems.
Hope that helps
Ludwig Tauer